SNPS - Synopsys and TSMC Streamline Multi-Die System Complexity with Unified Exploration-to-Signoff Platform and Proven UCIe IP on TSMC N3E Process | Benzinga
Comprehensive Multi-Die System Design Solution Supports 3Dblox 2.0 Standard and TSMC 3DFabricTM Technologies to Boost Productivity for Fast Heterogeneous Integration
Highlights:
- Synopsys 3DIC Compiler integrates with 3Dblox 2.0 standard for heterogeneous integration and a complete exploration-to-signoff solution.
- Synopsys UCIe PHY IP, which achieved first-pass silicon success on TSMC N3E process, provides low-latency, low-power, and high-bandwidth die-to-die connectivity.
- The combination of UCIe PHY IP and 3DIC Compiler optimizes multi-die system design for higher quality-of-results with minimal integration risk.
SUNNYVALE, Calif., Sept. 27, 2023 /PRNewswire/ -- Synopsys, Inc. (Nasdaq: SNPS) today announced it is extending its collaboration with TSMC to advance multi-die system designs with a comprehensive solution supporting the latest 3Dblox 2.0 standard and TSMC's 3DFabric™ technologies. The Synopsys Multi-Die System solution includes 3DIC Compiler, a unified exploration-to-signoff platform that delivers the highest levels of design efficiency for capacity and performance. In addition, Synopsys has achieved first-pass silicon success of its Universal Chiplet Interconnect Express (UCIe) IP on TSMC's leading N3E process for seamless die-to-die connectivity.
"TSMC has been working closely with Synopsys to deliver differentiated solutions that address designers' most complex challenges from early architecture to manufacturing," said Dan Kochpatcharin, head of the Design Infrastructure Management Division at TSMC. "Our ...